Normal wireless communications systems use a transmitter with a single antenna and a receiver with a single antenna to transmit and receive information. Wireless communications systems with a single transmitter antenna are commonly referred to as single output (SO) systems and systems with a single receiver antenna are known as single input (SI) systems. Therefore, a single input and single output system is known as a SISO system.
In search of increased data rates, greater channel capacity (better efficiency, defined in bits/second/hertz), better transmission quality, and higher diversity, wireless communications designers have started to use multiple antennas, both at the transmitter and the receiver. A system with multiple transmitter antennas is known as a multiple output (MO) system and one with multiple receiver antennas is know as a multiple input (MI) system. Systems with both MO and MI are referred to as MIMO systems. Communications systems with multiple input and/or output antennas offer greater diversity, increased channel capacity, and typically trade off error performance for higher data rates. One class of communications systems with multiple output antennas are commonly said to have transmit diversity, or TD for short.
Unfortunately, designing a wireless receiver for a communications system featuring TD can be difficult when the communications system can use one out of a plurality of different TD schemes. For example, in IS2000, a third generation wireless communications system standard, two different open-loop TD schemes have been adopted for use. The two TD schemes are Orthogonal Transmit Diversity (OTD) and Space-time Spreading (STS). In Wideband Code-Division Multiple Access (WCDMA), yet another third generation communications system standard, both open-loop and closed-loop TD schemes have been accepted. In other third generation communications systems, different open-loop and closed-loop TD schemes, including TD schemes for MIMO systems, are under consideration for acceptance into the various technical standards.
TD schemes operate by transmitting signals via multiple antennas from the same transmitter that are received by a receiver and the receiver performs post-processing to recover the transmitted signals. Alternatively, TD schemes may transmit a signal that is received by multiple antennas with each of the multiple receive antennas producing a slightly different image that are combined to recover the transmitted signal. Both the transmitter and the receiver may have multiple antennas. For example, in OTD, separate antennas are used to transmit even and odd data bits. While in STS, odd and even data bits are transmitted on each transmit antenna.
A concern when designing a TD receiver for the various TD schemes is that in order to support all of the TD schemes specified in a single technical standard or to support TD schemes in multiple standards, the receiver architecture would necessarily be very complex and large. For a receiver that supports dual or multiple standards, the problem becomes even more significant.
A straightforward implementation of the receiver would involve the design of separate TD decoders for each TD scheme specified in the technical standard. However, such an approach would be highly inefficient. For example, in a communications system that uses STS and OTD TD schemes with two transmit antennas, the combined TD decoder architecture would require: 40 real multipliers, 12 adders, and two memory elements. The large number of hardware elements implies a large physical size for the receiver and the consumption of a large amount of power. Obviously, a receiver architecture with a TD decoder that can share hardware elements would greatly reduce both the complexity and the size of the receiver.
In one solution, proposed in U.S. Pat. No. 6,317,410, a TD decoder architecture supporting STS and OTD TD schemes is proposed wherein implementation complexity is reduced through the use of switches. The switches permit the sharing of certain hardware components, such as multipliers, between the two TD schemes. Though the switches permit a more efficient receiver implementation, it is clear that the complexity of the receiver architecture is not minimized. Additionally, the proposed solution works only with STS and OTD TD schemes. The additional support of any other TD scheme would require a redesign of the TD decoder architecture.
An additional concern when designing a TD receiver is simply the minimization of the hardware requirement for the receiver. It is desirable to have the TD receiver's hardware requirement to be close to that of a non-TD receiver. As stated previously, a receiver with less hardware is a smaller receiver that uses less power and is cheaper overall to manufacture.
A need has therefore arisen for a TD receiver architecture that minimizes hardware requirements and can simultaneously support multiple TD schemes without incurring significantly increased hardware complexity.